Integrated Circuit Design Consulting
ASIC and VLSI design and verification consulting using tools
such as Verilog, VHDL, Synopsys, Cadence, SPICE, since 1986.
SIC87: 8711 NAICS: 541330
consulting contracts since 1986:
Information Processing Techniques: Verilog consulting
Chatham Group: IC design analysis for litigation
Synopsys: created test cases for new release
Intel: verified 486 and 386 SL PC chip-sets
Fujitsu: verified SUN SPARC-H chipset
Gazelle: setup layout parasitic extraction of GaAs IC's
Acuson: redesigned ultrasound gate array
Raynet: redesigned telecom gate array
Kodak Berkeley Research: designed and layed-out encryption CMOS chips
Logical Services: reverse engineered set-top NMOS chips
Kaiser Electronics: designed and verified video gate arrays
Watkins-Johnson: designed and layed-out Tektronix analog arrays
Nara: reverse engineered PC BiPolar arrays
prior employment:
Logical Consulting Corporation: Senior Consultant;
6/85-9/86; Palo Alto, CA; Involved in all aspects of the consulting business.
Contracts included writing and testing Pascal software modules as part of a
logic simulator package and designing and testing modem controller logic
using a standard cell ASIC. Selected as the local design representative for
Tektronix analog arrays.
Advanced Micro Devices: Senior IC Design Engineer;
6/81-6/85; Sunnyvale, CA; Designed the 22V10 PAL, US Patent 4717912,
and other programmable logic integrated circuits.
Harris Semiconductor: IC Design Engineer; 6/79-6/81;
Melbourne, FL; Designed programmable logic integrated circuits.
education:
BSEE: Massachusetts Institute of Technology, 1979
links:
[Alopatek]
[ASIC Design and Verification]
[Tannen Engineering Services]
[ACM_SIGDA]
[AEA]
[Ambit]
[ASICs]
[Async]
[Avant!]
[Cadence]
[Cadmazing]
[ChipCenter]
[Chipworks]
[Chip-Guru]
[CMPnet]
[DAC]
[DeepChip]
[DesignCon]
[Doulos]
[EDAC]
[EDAconnect]
[EDAtoolsCAFE]
[EDTN]
[EDN]
[EENET]
[EE_Hotlinks]
[ElectronicDesign]
[ENEN]
[Exify]
[FPGA]
[Fujitsu]
[ICplanet]
[IEC]
[IEEE]
[IEEE_Consultants]
[IEEE_Consultants_SV]
[LSI]
[MIT]
[National]
[Orbit]
[PATCA]
[PHOAKS]
[Questlink]
[Quickturn]
[SBA]
[SPICE]
[SPICE_Links]
[Synopsys]
[Synplicity]
[Tanner]
[TechWeb]
[Tektronix]
[Toshiba]
[TSMC]
[Verilog_FAQ]
[Verilog_OVI]
[VHDL]
[VHDL_FAQ]
[VLSI_FAQ]
[Wescon]
[google search for "ASIC VLSI Verilog VHDL Synopsys Cadence SPICE"]
[dmoz open directory project]
[USA Online]
